1. Field of the Invention
The present invention relates to a method for fabricating a thin-film transistor having, as the active layer, a thin semiconductor film of, for example, polycrystalline silicon or the like as formed on an insulating substrate. For example, it relates to a method for fabricating a thin-film transistor to be used as a switching element in active matrix-type display devices. More precisely, the invention relates to a method for fabricating a thin-film transistor in a low-temperature process (in which, for example, the highest processing temperature is not higher than 600xc2x0 C.). Further more precisely, it relates to a threshold voltage control technique for thin-film transistors.
2. Description of the Related Art
Thin-film transistors are widely used as switching elements in active matrix-type, liquid-crystal display devices. Heretofore, in particular, polycrystalline silicon has been being employed for thin semiconductor films to be the active layers in thin-film transistors. Polycrystalline silicon thin-film transistors can be used not only for switching elements but also for circuit elements. Using them, therefore, makes it possible to construct both switching elements and peripheral driving circuits on one and the same substrate. In addition, polycrystalline silicon thin-film transistors can form fine patterns. With their fine patterns, therefore, the area for the switching elements in pixel structures can be reduced and the pixel apertures therein can be enlarged. Heretofore, in the process of fabricating polycrystalline silicon thin-film transistors, the highest processing temperature reaches around 1000xc2x0 C. For those thin-film transistors, therefore, quartz glass and the like with good heat resistance are used as insulating substrates. Because of the problem intrinsic to the high-temperature process, glass substrates having a relatively low melting point are difficult to use for them. However, use of low-melting-point glass materials is indispensable for reducing the production costs for liquid-crystal display devices. Recently, therefore, a so-called low-temperature process has been being developed for fabricating polycrystalline silicon thin-film transistors, in which the highest processing temperature is not higher than 600xc2x0 C. In particular, for fabricating large-sized liquid-crystal display devices, such a low-temperature process is extremely advantageous as being inexpensive.
For one step of the low-temperature process, an ion-showering technique has heretofore been developed, which is for dopant implantation at relatively low temperatures. Not requiring mass separation, all ions are implanted in a large-area thin-film semiconductor through ion-showering. However, in the ion-showering apparatus with no mass separation, even ions (hydrogen ions, etc.) except those of the intended dopant are also implanted in semiconductor films, in which, therefore, it is difficult to accurately control low-dose ions of smaller than 1xc3x971014/cm2. Dopant ion implantation at a low dose of not larger than 1xc3x971014/cm2 is necessary for threshold voltage (Vth) control for thin-film transistors. In fabricating thin-film transistors for large-area liquid-crystal displays, especially those for active matrix-type liquid-crystal displays at a processing temperature of not higher than 600xc2x0 C., Vth control is indispensable for ensuring the intended electric characteristics of the devices. However, in conventional ion-showering systems, accurate control of low-dose ions is impossible. In that situation, recently, a different type of ion implantation apparatus has been developed, in which dopant ions having been subjected to mass separation are implanted in a thin-film semiconductor formed on a large-area insulating substrate. In one example of the apparatus, dopant ions are subjected to mass separation while being aligned in line beams of from 300 to 600 nm, prior to being implanted in semiconductor films. In that apparatus, relatively low-dose ion implantation is possible even in large-size glass substrates of 600xc3x97720 mm square or so. Low-dose implantation with the ion implantation apparatus of that type, which is directed to Vth control for thin-film transistors, is herein referred to as Vth ion implantation. This technique is disclosed, for example, in JP-A-3-6865.
Vth ion implantation for thin-film transistors generally comprises selective, low-dose pre-implantation of, for example, boron ions B+ in a part of thin semiconductor films to be the active layers (channel region) of thin-film transistors. However, Vth of thin-film transistors is greatly influenced not only by the boron ion concentration of B+ in the active, thin-film semiconductor layers but also by the grain size of the polycrystalline silicon grains constituting the thin-film semiconductor and even by the defect level density in the interface of polycrystalline silicon/silicon dioxide. Therefore, for good Vth control in thin-film transistors with no substantial Vth fluctuation therein, the conventional Vth ion implantation is problematic in that it could not meet the requirement for the intended Vth control.
The present invention is to solve the problem with the related art noted above, and its object is to provide a method for fabricating a thin-film transistor, in which more accurate Vth control in the thin-film transistor fabricated is possible. To attain the object, we, the inventors have taken the measures mentioned below, and have completed the invention. Specifically, the invention is a method for fabricating a thin-film transistor having a laminate structure that comprises a thin-film semiconductor, a gate-insulating film as formed adjacent to one surface of the thin-film semiconductor, and a gate electrode as laminated on the thin-film semiconductor via the gate-insulating film, and is formed on an insulating substrate. The method comprises an implantation step of selectively implanting a dopant in the thin-film semiconductor to form a source region and a drain region of the thin-film transistor, and a rapid thermal annealing (RTA) step of activating the implanted dopant through controlled RTA for Vth control in the thin-film transistor. Preferably, the method comprises, prior to the implantation step, an optional pre-implantation step of selectively implanting a dopant at least in the part of the thin-film semiconductor to be the channel region of the thin-film transistor, thereby controlling the Vth of the thin-film transistor. The pre-implantation step is combined with the RTA step to optimize the Vth control in the thin-film transistor to be fabricated in the method. Also preferably, the RTA step comprises gradually heating the insulating substrate, then exposing the thin-film semiconductor to ultraviolet rays for rapidly heating it, and thereafter gradually cooling it.
To activate the dopant having been implanted in thin-film semiconductors, excimer lasers have heretofore been used for laser activation annealing. Being different from this, RTA is employed in the invention. RTA is for activating the dopant in thin-film semiconductors through short exposure to light of which the wavelength falls within an ultraviolet range. The intrinsic object of RTA is for dopant activation. However, we, the inventors have found that Vth of thin-film transistors greatly varies depending on the condition for RTA. RTA produces a sound SiO2 structure in gate-insulating films, and reduces the defect level density in the interface between a thin-film semiconductor of polycrystalline silicon and SiO2, and even reduces the intergranular and intragranular defect level density of polycrystalline silicon grains. In RTA, the degree of boron ion activation for B+ having been previously implanted into thin-film semiconductors through Vth ion implantation also greatly depends on the defect level density noted above. Therefore, Vth of thin-film transistors can be controlled as a result of reducing the defect level density in the interface of polycrystalline silicon/SiO2 and reducing the intergranular and intragranular defect level density of polycrystalline silicon grains. As mentioned above, Vth of thin-film transistors greatly depends on essentially the dose in Vth ion implantation and the RTA condition. In the invention, Vth ion implantation is appropriately combined with RTA to optimize the condition for Vth control in the thin-film transistors fabricated.